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Computer Architecture (14-1)
HOME : PREVIOUS COURSES : Computer Architecture (14-1)
4190.308 Spring 2014 
Computer Architecture

Lecture Note

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Chapter0

Course Information

Lecture1

Intro to BSV & Combinational Circuits

Lecture2

Sequential Circuits

Lecture3

Folding Complex Combinational Circuits to Save Area

Lecture4

Pipelining Combinational Circuits

Chapter1

Computer Abstractions and Technology

Chapter2

Machine‐Level Programming I: Basics

Chapter3

Machine‐Level Programming II: Arithmetic & Control

Chapter4

Machine‐Level Programming III: Switch Statements and IA32 Procedures

Chapter5

Processor Architecture: The Y86 Instruction Set Architecture

Chapter6

Instruction Set Architecture Overview

Chapter1.1

Performance

Lecture5

Y86 ISA and Instruction Decoding

Lecture6

Non-Pipelined and Multicycle Y86 Implementations

Chapter7

Pipelining Basics

Lecture7

Simple Pipelined Y86 Implementations

Lecture8

BSV execution model and concurrent rule scheduling

Lecture9

EHRs: Designing modules with concurrent methods

Lecture10

Data Hazards in Pipelined Architectures

Lecture11

Branch Prediction

Chapter8

Pipelining Wrapup

Chapter12

Memory Hierarchy

Chapter13

Cache Memories

Lecture12

Realistic Memories and Caches

Chapter14

Virtual Memory: Concepts

Chapter15

Virtual Memory: Systems

Chapter16

Exceptional Control Flow


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